High Speed
High Resolution
Lowest Power
Our patented Analog-to-Digital Converters (ADCs)
as chips and IP beat the competition by 10x
High Speed
High Resolution
Lowest Power
Our patented Analog-to-Digital
Converters (ADCs)
beat the competition by 10x
Markets
LIDAR ADCs for Autonomous Vehicles
Analog bottleneck
400 MHz BW 10-bit ADCs
Next-gen comm. wireless and wireline ADCs
Analog bottleneck
800 MHz BW 11-bit ADCs
Portable medical imaging ADCs (1st customer)
Analog bottleneck
45 MHz BW 15-bit ADCs
Switched-Mode Signal Processing
Analog design in the time-domain
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Signal information encoded only in pulse-widths
Near-supply analog operation
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Signal swing only depends on width of pulses
Improves with CMOS scaling
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Transistors get faster with scaling
*US Patent #10075133B2: Systems and methods for ring-oscillator based operational amplifiers for scaled CMOS technologies
SMSP enables high-performance mixed-signal design in scaled CMOS
Our products – Highly integrated chips and ADC IP
Next-generation ADCs
Our first generation of products is for the medical imaging and 4G/WiFI markets. We have silicon-proven devices from TSMC’s 28nm HPM process and test results are available under NDA. Our next generation of products is geared for the high bandwidth requirements needed for LIDAR, 5G wireless, and G.fast communication systems. We also have basic IP available such as bandgap references and LVDS drivers.
SMI Si-proven ADC advantages
Using continuous-time sigma-delta ADCs reduce system cost as it relaxes the anti-aliasing requirements. In addition, because of the input being resistive instead ofcapacitive like most ADCs, it lowers the power requirements of the input buffer. Also, our ADCs are able to tolerate a lot of clock jitter which allows the system designer to use less-costly PLLs for clock generation.SMI lowers system cost
Single voltage supply operation
Robust jitter tolerance
Oversampled architecture
Resistive input, easier to drive
Knowledge Base
Published Papers
Conference Presentations
Our partners
Meet Our Team
Jayanth Kuppambatti
Jayanth received his PhD in 2014 from Columbia University and has been working on switched-mode signal processing for over 7 years. He has published at ISSCC, CICC, ESSCIRC, JSSC and has 3 granted patents.
Augustine Kuo
Augustine received his BS EECS from UC Berkeley and MS ECE from Carnegie Mellon University. He has over 20 years of experience and has worked at Cirrus Logic, Altima Communications (purchased by Broadcom), Broadcom and SuVolta. He has 9 patents granted.
R Scott Hills
Scott received his BS EE from Cal Poly. He has over 30 years of experience and has worked at Cirrus Logic, AMD, IDT, Dialog Semi, and Cortus.
